As information age progresses, flat panel display (FPD) devices having the characteristics of light weight, thin profile, and low power consumption have been required. The FPD devices are classified according to self-emission ability: an emissive type where a display element itself emits light and a non-emissive type where the FPD device includes an external light source. The emissive type FPD devices include plasma display panel (PDP) devices, field emission display (FED) devices and electroluminescent display (ELD) devices, while the non-emissive type FPD devices include liquid crystal display (LCD) devices. Among various FPD devices, LCD devices have been widely used for a notebook computer, a monitor and a television because of their superiority in resolution, color display and display quality.
An LCD device includes two substrates spaced apart and facing each other and a liquid crystal layer interposed between the two substrates. Each of the two substrates includes an electrode on a surface facing the other of the two substrates. A voltage is applied to each electrode to induce an electric field between the electrodes and the alignment of the liquid crystal molecules as well as the transmittance of light through the liquid crystal layer is controlled by varying the intensity of the electric field, thereby the LCD device displaying images.
A fabrication process for an LCD device includes a process of forming a first substrate, which may be referred to as an array substrate, having a thin film transistor (TFT) as a switching element and a pixel electrode in each pixel region, a process of forming a second substrate, which may be referred to as a color filter substrate, having a color filter layer and a common electrode facing the pixel electrode and a process of attaching the first and second substrates and forming a liquid crystal layer between the first and second substrates to form liquid crystal panels, i.e., liquid crystal cells.
The process of forming the liquid crystal panels is referred to as a liquid crystal cell process. The liquid crystal cell process includes a step for forming alignment layers on the first and second substrates, a step for attaching the first and second substrates to form a cell gap therebetween, a step for cutting the attached first and second substrates into the liquid crystal panels and a step for forming the liquid crystal layer in each liquid crystal panel. For example, after a seal pattern is formed at a boundary region, the first and second substrates are attached and the attached first and second substrates are cut into the liquid crystal panels. Next, a liquid crystal material is injected into each liquid crystal panel using a capillary phenomenon under a vacuum condition. This injection method of the liquid crystal material requires a process time over 10 hours.
To reduce the process time for forming the liquid crystal panel, a sequential dispensing and attaching method where a liquid crystal material is dispended on one of the first and second substrates and the first and second substrates are sequentially attached and an apparatus for the sequential dispensing and attaching method have been suggested. For example, after a seal pattern of an ultraviolet (UV) curable material is formed on a first substrate, a liquid crystal material is dispensed on the one of the first substrate in the seal pattern. Next, a second substrate is aligned with and attached to the first substrate, and the seal pattern is cured with a UV ray. Next, the attached first and second substrates are cut into liquid crystal panels. In a sequential dispensing and attaching method, since the liquid crystal material is dispensed without using a capillary phenomenon, the process time for forming the liquid crystal panels is reduced. In addition, since the liquid crystal material is dispensed from an upper portion of the seal pattern, the seal pattern has a closed rectangular ring shape without an injection hole.
FIG. 1 is a plan view showing a liquid crystal panel for a liquid crystal display device according to the related art, FIG. 2 is a magnified view of a portion A of FIG. 1, and FIG. 3 is a cross-sectional view taken along a line III-III of FIG. 2. In FIGS. 1, 2 and 3, a liquid crystal panel 1 includes a display area AA and a non-display area NA surrounding the display area AA. A plurality of gate pads 42, a plurality of data pads 47, a plurality of gate link lines 43 and a plurality of data link lines 48 are formed in the non-display area NA on a first substrate 10 of the liquid crystal panel 1. The plurality of gate link lines 43 are connected to the plurality of gate pads 42, and the plurality of data link lines 48 are connected to the plurality of data pads 47. A plurality of gate lines 12, a plurality of data lines 22, a plurality of thin film transistors (TFTs) Tr and a plurality of pixel electrodes 40 are formed in the display area AA on the first substrate 10 of the liquid crystal panel 1. The plurality of gate lines 12 are connected to the plurality of gate link lines 43, and the plurality of data lines 22 are connected to the plurality of data link lines 48. The plurality of gate lines 12 and the plurality of data lines 22 cross each other to define a plurality of pixel regions P. In addition, the TFT Tr is connected to the gate line 12 and the data line 22, and the pixel electrode 49 is connected to the TFT Tr in each pixel region P.
A second substrate 50 of the liquid crystal panel 1 faces and is spaced apart from the first substrate 10. A color filter layer 54, a black matrix 52 and a common electrode 57 are formed on an inner surface of the second substrate 10. The color filter layer 54 includes red, green and blue color filters R, G and B each corresponding to the pixel region P. In addition, the black matrix 52 corresponds to the gate line 12, the data line 22 and the non-display area NA, and the common electrode 57 is formed on the entire second substrate having the color filter layer 54 and the black matrix 52. Further, a liquid crystal layer (not shown) is formed between the first and second substrates 10 and 50, and a seal pattern 70 of a UV curable material is formed in the non-display area NA between the first and second substrates 10 and 50.
A plurality of driving lines 17 for driving the liquid crystal panel 1 are formed on the first substrate 10 in the non-display area NA. The plurality of driving lines 17 may be disposed between the plurality of gate pads 42 and the display area AA and between the plurality of data pads 47 and the display area AA. For example, a common voltage applied to the common electrode 57 or a gate low voltage applied to the gate line 12 for turning off the TFT Tr may be transmitted from an external circuit unit (not show) through the plurality of driving lines 17. The seal pattern 70 covers the plurality of driving lines 17 and the black matrix 52 covers the seal pattern 70 and the plurality of driving lines 17. After the first and second substrates 10 and 50 are attached, the seal pattern 70 of a UV curable material is cured with a UV ray. Since the black matrix 52 on the second substrate 50 blocks the seal pattern 70 completely, the UV ray is irradiated onto the seal pattern 70 from a UV source under the first substrate 10 through the plurality of driving lines 17. When an area proportion of the plurality of driving lines 17 is smaller than about 50%, the seal pattern 70 can be cured uniformly by the UV ray through the plurality of driving lines 17. Accordingly, the plurality of driving lines 17 are formed to be spaced apart from each other by a width equal to or greater than a width of each driving line 17.
After the liquid crystal panel 1 is formed, a backlight unit is disposed under the liquid crystal panel 1 and a driving unit is connected to the liquid crystal panel 1 and the backlight unit, thereby an LCD device completed. The driving unit may include a printed circuit board (PCB) and may be divided into a gate driving unit and a data driving unit. The gate driving unit and the data driving unit may be connected to the gate pad 42 in one side portion and the data pad 47 in another side portion, respectively, of the liquid crystal panel 1 through one of a tape carrier package (TCP) and a flexible printed circuit (FPC).
Recently, an LCD device has been applied to portable electronic devices such as a cellular phone and a personal digital assistant (PDA) as well as a television and a monitor. Since the LCD device applied to the portable electronic devices has a relatively small size, the LCD device is required to have a smaller non-display area for a larger display area. Accordingly, a width between adjacent driving lines is reduced and a seal pattern may not be cured uniformly. Further, to reduce a non-display area, a plurality of gate pads and a plurality of data pads may be formed on a single side portion of a liquid crystal panel and a driving unit may be connected to the gate pads and the data pads at the single side portions. Since a plurality of gate link lines for a gate high voltage applied to a gate line for turning on a TFT are also included in the driving lines, the number of the driving lines increases. As a result, a sufficient width for a uniform cure of the seal pattern is not obtained.
FIG. 4 is a plan view showing a non-display area of a small-sized liquid crystal panel according to the related art, and FIG. 5 is a cross-sectional view taken along a line V-V of FIG. 4. For simplicity, the same reference numbers will be used to refer to the same parts in FIGS. 1, 4 and 5. In FIGS. 4 and 5, a small-sized liquid crystal panel 1 includes a display area (not shown) and a non-display area NA surrounding the display area. A plurality of gate pads (not shown) and a plurality of data pads (not shown) are formed in the non-display area NA at a single side of the small-sized liquid crystal panel 1. In addition, a plurality of driving lines including a plurality of gate link lines 43 and a plurality of data link lines (not shown) are formed the non-display area NA. Since the plurality of gate link lines 43 connect the plurality of gate pads and a plurality of gate lines and the plurality of data link lines (not shown) connect the plurality of data pads and a plurality of data lines, the number of the plurality of gate link lines 43 may correspond to the plurality of gate lines and the number of the plurality of data link lines may correspond to the plurality of data lines. As a result, the number of the plurality of driving lines increase as compared with a large-sized liquid crystal panel.
Since the number of the plurality of driving lines including the plurality of gate link lines 43 and the plurality of data link lines increase, a seal pattern 70 is formed in the non-display area NA to overlap a portion of the plurality of gate link lines 43. For example, the non-display area NA may be classified into a seal area SA where the seal pattern 70 and the portion of the plurality of gate link lines 43 are formed and a non-seal area NSA where the other portion of the plurality of gate link lines 43 are formed. In addition, a black matrix 52 is formed to completely cover the plurality of gate link lines 43 and the seal pattern 70.
Since the area proportion of the non-display area NA is limited in the small-sized liquid crystal panel 1, a distance d1 between adjacent two gate link lines 43 may be reduced as compared with a large-sized liquid crystal display panel. For example, when each gate link line 43 has a width of about 6 μm to about 10 μm, the adjacent two gate link lines 43 may be separated by the distance d1 of about 2 μm to about 4 μm. However, the adjacent two gate link lines 43 may be electrically shorted due to the short distance d1 therebetween. In addition, since an area proportion of the plurality of gate link lines 43 is greater than about 50% due to the short distance d1, the seal pattern 70 may be insufficiently cured with a UV ray through the plurality of gate link lines 43. The insufficiently cured seal pattern 70 may cause contamination of a liquid crystal layer in the seal pattern 70 or deterioration in attachment of first and second substrates 10 and 50 in a subsequent fabrication process.